Interrupt Handler f35c f35c 8e 01 ff lds 0x01FF f35f 86 a0 ldaa 0xA0 f361 b7 10 39 staa (0x1039) ; OPTION Register f364 86 04 ldaa 0x04 f366 b7 10 3f staa (0x103F) ; CONFIG Register f369 86 01 ldaa 0x01 f36b b7 10 38 staa (0x1038) ; (Reserved) Register f36e 86 36 ldaa 0x36 f370 b7 10 09 staa (0x1009) ; DDRD Register f373 86 f8 ldaa 0xF8 f375 b7 10 01 staa (0x1001) ; (Reserved) Register f378 86 00 ldaa 0x00 f37a b7 10 07 staa (0x1007) ; DDRC Register f37d 86 00 ldaa 0x00 f37f b7 10 03 staa (0x1003) ; PORTC Register f382 86 00 ldaa 0x00 f384 b7 10 34 staa (0x1034) ; ADR4 Register f387 86 0f ldaa 0x0F f389 b7 10 32 staa (0x1032) ; ADR2 Register f38c 86 00 ldaa 0x00 f38e b7 10 26 staa (0x1026) ; PACTL Register f391 86 70 ldaa 0x70 f393 b7 10 30 staa (0x1030) ; ADCTL Register f396 96 01 ldaa (0x0001) ; Error_flags f398 98 02 eora (0x0002) f39a 26 06 bne [0xF3A2] f39c c6 01 ldab 0x01 f39e d7 00 stab (0x0000) f3a0 20 0d bra [0xF3AF] f3a2 43 coma Branch Target from f39a f3a3 27 06 beq [0xF3AB] f3a5 86 02 ldaa 0x02 f3a7 97 00 staa (0x0000) f3a9 20 04 bra [0xF3AF] f3ab 13 05 40 05 brclr (0x0005), 0x40, [0xF3B4] Branch Target from f3a3 f3af ce 00 01 ldx 0x0001 Branch Target from f3a0, f3a9 f3b2 20 06 bra [0xF3BA] f3b4 ce 00 06 ldx 0x0006 Branch Target from f3ab f3b7 15 00 03 bclr (0x0000), 0x03 f3ba 5f clrb Branch Target from f3b2 f3bb e7 00 stab (X+0x00) Branch Target from f3c1 f3bd 08 inx f3be 8c 02 00 cpx 0x0200 f3c1 26 f8 bne [0xF3BB] f3c3 bd f4 50 jsr (0xF450)-Initialise-vars f3c6 b6 10 30 ldaa (0x1030) Branch Target from f3cb ; ADCTL Register f3c9 85 80 bita 0x80 f3cb 27 f9 beq [0xF3C6] f3cd b6 10 42 ldaa (0x1042) ; ATFtempSensor Voltage f3d0 43 coma f3d1 97 17 staa (0x0017) ; ATF_Temp f3d3 86 00 ldaa 0x00 f3d5 b7 10 0b staa (0x100B) ; CFORC Register f3d8 86 00 ldaa 0x00 f3da b7 10 0c staa (0x100C) ; OC1M Register f3dd 86 7f ldaa 0x7F f3df b7 10 22 staa (0x1022) ; TMSK1 Register f3e2 86 08 ldaa 0x08 f3e4 b7 10 24 staa (0x1024) ; TMSK2 Register f3e7 86 ee ldaa 0xEE f3e9 b7 10 20 staa (0x1020) ; TCTL1 Register f3ec 86 2a ldaa 0x2A f3ee b7 10 21 staa (0x1021) ; TCTL2 Register f3f1 86 00 ldaa 0x00 f3f3 b7 10 58 staa (0x1058) f3f6 86 ff ldaa 0xFF f3f8 b7 10 23 staa (0x1023) ; TFLG1 Register f3fb 86 fe ldaa 0xFE f3fd b7 10 25 staa (0x1025) ; TFLG2 Register f400 fc 10 0e ldd (0x100E) ; TCNT Register f403 c3 9c 40 addd 0x9C40 f406 fd 10 18 std (0x1018) ; TOC2 Register f409 fd 10 1a std (0x101A) ; TOC3 Register f40c fd 10 1c std (0x101C) ; TOC4 Register f40f fc 10 0e ldd (0x100E) ; TCNT Register f412 c3 07 d0 addd 0x07D0 f415 fd 10 1e std (0x101E) ; TIC4 Register f418 86 10 ldaa 0x10 f41a b7 10 2c staa (0x102C) ; SCCR1 Register f41d 86 2e ldaa 0x2E f41f b7 10 2d staa (0x102D) ; SCCR2 Register f422 86 24 ldaa 0x24 f424 b7 10 2b staa (0x102B) ; BAUD Register f427 86 00 ldaa 0x00 f429 b7 10 63 staa (0x1063) f42c 86 00 ldaa 0x00 f42e b7 10 71 staa (0x1071) f431 86 ff ldaa 0xFF f433 97 c6 staa (0x00C6) f435 86 0d ldaa 0x0D Branch Target from f449 f437 97 c3 staa (0x00C3) f439 15 00 0c bclr (0x0000), 0x0C f43c 14 00 10 bset (0x0000), 0x10 f43f 0e cli f440 bd f2 ec jsr (0xF2EC)-Test-RAM f443 bd f3 10 jsr (0xF310)-Test-ROM f446 15 00 10 bclr (0x0000), 0x10 f449 12 00 0c e8 brset (0x0000), 0x0C, [0xF435] f44d 7e df 7e jmp (0xDF7E)-Main