Interrupt Handler f41e

f41e 8e 01 ff    lds 0x01FF
f421 86 a0       ldaa 0xA0
f423 b7 10 39    staa (0x1039) ; OPTION Register
f426 86 04       ldaa 0x04
f428 b7 10 3f    staa (0x103F) ; CONFIG Register
f42b 86 01       ldaa 0x01
f42d b7 10 38    staa (0x1038) ; (Reserved) Register
f430 86 36       ldaa 0x36
f432 b7 10 09    staa (0x1009) ; DDRD Register
f435 86 f8       ldaa 0xF8
f437 b7 10 01    staa (0x1001) ; (Reserved) Register
f43a 86 00       ldaa 0x00
f43c b7 10 07    staa (0x1007) ; DDRC Register
f43f 86 00       ldaa 0x00
f441 b7 10 03    staa (0x1003) ; PORTC Register
f444 86 00       ldaa 0x00
f446 b7 10 34    staa (0x1034) ; ADR4 Register
f449 86 0f       ldaa 0x0F
f44b b7 10 32    staa (0x1032) ; ADR2 Register
f44e 86 00       ldaa 0x00
f450 b7 10 26    staa (0x1026) ; PACTL Register
f453 86 70       ldaa 0x70
f455 b7 10 30    staa (0x1030) ; ADCTL Register
f458 96 01       ldaa (0x0001) ; Error_flags
f45a 98 02       eora (0x0002)
f45c 26 06       bne [0xF464]
f45e c6 01       ldab 0x01
f460 d7 00       stab (0x0000)
f462 20 0d       bra [0xF471]
f464 43          coma		Branch Target from f45c
f465 27 06       beq [0xF46D]
f467 86 02       ldaa 0x02
f469 97 00       staa (0x0000)
f46b 20 04       bra [0xF471]
f46d 13 05 40 05 brclr (0x0005), 0x40, [0xF476]		Branch Target from f465
f471 ce 00 01    ldx 0x0001		Branch Target from f462, f46b
f474 20 06       bra [0xF47C]
f476 ce 00 06    ldx 0x0006		Branch Target from f46d
f479 15 00 03    bclr (0x0000), 0x03
f47c 5f          clrb		Branch Target from f474
f47d e7 00       stab (X+0x00)		Branch Target from f483
f47f 08          inx
f480 8c 02 00    cpx 0x0200
f483 26 f8       bne [0xF47D]
f485 bd f5 0f    jsr (0xF50F)-Initialise-vars
f488 b6 10 30    ldaa (0x1030)		Branch Target from f48d ; ADCTL Register
f48b 85 80       bita 0x80
f48d 27 f9       beq [0xF488]
f48f b6 10 42    ldaa (0x1042) ; ATFtempSensor Voltage
f492 43          coma
f493 97 17       staa (0x0017) ; ATF_Temp
f495 86 00       ldaa 0x00
f497 b7 10 0b    staa (0x100B) ; CFORC Register
f49a 86 00       ldaa 0x00
f49c b7 10 0c    staa (0x100C) ; OC1M Register
f49f 86 7f       ldaa 0x7F
f4a1 b7 10 22    staa (0x1022) ; TMSK1 Register
f4a4 86 08       ldaa 0x08
f4a6 b7 10 24    staa (0x1024) ; TMSK2 Register
f4a9 86 ee       ldaa 0xEE
f4ab b7 10 20    staa (0x1020) ; TCTL1 Register
f4ae 86 2a       ldaa 0x2A
f4b0 b7 10 21    staa (0x1021) ; TCTL2 Register
f4b3 86 00       ldaa 0x00
f4b5 b7 10 58    staa (0x1058)
f4b8 86 ff       ldaa 0xFF
f4ba b7 10 23    staa (0x1023) ; TFLG1 Register
f4bd 86 fe       ldaa 0xFE
f4bf b7 10 25    staa (0x1025) ; TFLG2 Register
f4c2 fc 10 0e    ldd (0x100E) ; TCNT Register
f4c5 c3 9c 40    addd 0x9C40
f4c8 fd 10 18    std (0x1018) ; TOC2 Register
f4cb fd 10 1a    std (0x101A) ; TOC3 Register
f4ce fd 10 1c    std (0x101C) ; TOC4 Register
f4d1 fc 10 0e    ldd (0x100E) ; TCNT Register
f4d4 c3 07 d0    addd 0x07D0
f4d7 fd 10 1e    std (0x101E) ; TOC5 Register
f4da 86 10       ldaa 0x10
f4dc b7 10 2c    staa (0x102C) ; SCCR1 Register
f4df 86 2e       ldaa 0x2E
f4e1 b7 10 2d    staa (0x102D) ; SCCR2 Register
f4e4 86 24       ldaa 0x24
f4e6 b7 10 2b    staa (0x102B) ; BAUD Register
f4e9 86 00       ldaa 0x00
f4eb b7 10 63    staa (0x1063)
f4ee 86 00       ldaa 0x00
f4f0 b7 10 71    staa (0x1071)
f4f3 86 ff       ldaa 0xFF
f4f5 97 c6       staa (0x00C6)
f4f7 86 0d       ldaa 0x0D		Branch Target from f508
f4f9 97 c3       staa (0x00C3)
f4fb 15 00 0c    bclr (0x0000), 0x0C
f4fe 14 00 10    bset (0x0000), 0x10
f501 0e          cli
f502 bd f3 ae    jsr (0xF3AE)-Test-RAM
f505 15 00 10    bclr (0x0000), 0x10
f508 12 00 0c eb brset (0x0000), 0x0C, [0xF4F7]
f50c 7e e0 4b    jmp (0xE04B)-Main